A Survey and Evaluation of FPGA High-Level Synthesis Tools

High-level synthesis (HLS) is increasingly popular for the design of high-performance and energy-efficient heterogeneous systems, shortening time-to-market and addressing today's system complexity. HLS allows designers to work at a higher-level of abstraction by using a software program to specify the hardware functionality. Additionally, HLS is particularly interesting for designing field-programmable gate array circuits, where hardware implementations can be easily refined and replaced in the target device. Recent years have seen much activity in the HLS research community, with a plethora of HLS tool offerings, from both industry and academia. All these tools may have different input languages, perform different internal optimizations, and produce results of different quality, even for the very same input description. Hence, it is challenging to compare their performance and understand which is the best for the hardware to be implemented. We present a comprehensive analysis of recent HLS tools, as well as overview the areas of active interest in the HLS research community. We also present a first-published methodology to evaluate different HLS tools. We use our methodology to compare one commercial and three academic tools on a common set of C benchmarks, aiming at performing an in-depth evaluation in terms of performance and the use of resources

The burden of endometriosis: costs and quality of life of women with endometriosis and treated in referral centres

BACKGROUND This study aimed to calculate costs and health-related quality of life of women with endometriosis-associated symptoms treated in referral centres. METHODS A prospective, multi-centre, questionnaire-based survey measured costs and quality of life in ambulatory care and in 12 tertiary care centres in 10 countries. The study enrolled women with a diagnosis of endometriosis and with at least one centre-specific contact related to endometriosis-associated symptoms in 2008. The main outcome measures were health care costs, costs of productivity loss, total costs and quality-adjusted life years. Predictors of costs were identified using regression analysis. RESULTS Data analysis of 909 women demonstrated that the average annual total cost per woman was €9579 (95% confidence interval €8559-€10 599). Costs of productivity loss of €6298 per woman were double the health care costs of €3113 per woman. Health care costs were mainly due to surgery (29%), monitoring tests (19%) and hospitalization (18%) and physician visits (16%). Endometriosis-associated symptoms generated 0.809 quality-adjusted life years per woman. Decreased quality of life was the most important predictor of direct health care and total costs. Costs were greater with increasing severity of endometriosis, presence of pelvic pain, presence of infertility and a higher number of years since diagnosis. CONCLUSIONS Our study invited women to report resource use based on endometriosis-associated symptoms only, rather than drawing on a control population of women without endometriosis. Our study showed that the economic burden associated with endometriosis treated in referral centres is high and is similar to other chronic diseases (diabetes, Crohn's disease, rheumatoid arthritis). It arises predominantly from productivity loss, and is predicted by decreased quality of lif

LegUp: Open-source High-level Synthesis Research Framework

The rate of increase in computing performance has been slowing due to the end of processor frequency scaling and diminishing returns from multiple cores. We believe the industry is heading towards heterogeneous computing, an accelerator era, where specialized hardware is harnessed for better power efficiency and compute performance. A natural platform for these accelerators are field-programmable gate arrays (FPGAs), which are integrated circuits that can implement large custom digital circuits including complete system-on-chips. However, programming an FPGA can be an arduous undertaking even for experienced hardware engineers. We propose raising the abstraction level by allowing a designer to incrementally move their design from a processor to a set of hardware accelerators, each automatically synthesized from a software implementation. This dissertation describes LegUp, an open-source high-level synthesis (HLS) framework that enables this new design methodology. We further present novel improvements to the quality of the synthesized circuits when targeting FPGAs. First, we present the LegUp high-level synthesis framework with an overview of our design flow. The software is unique among academic tools for offering a wide support of the ANSI C software language, for targeting a hybrid processor/accelerator architecture, and for being open-source. We also show that the quality of results produced by LegUp are competitive with a commercial HLS tool. Next, we present an FPGA architecture-specific HLS resource sharing approach. Our technique multi-pumps high-speed DSP blocks on modern FPGAs by clocking them at twice the system clock frequency. We show that multi-pumping can reduce circuit area without impacting performance. Following this, we describe a novel loop pipeline scheduling algorithm. Our approach handles complex constraints by using a backtracking method to discover better scheduling possibilities. This scheduling algorithm improves throughput for complex loop pipelines compared to prior work and a commercial tool. Finally, we examine LegUp's target memory architecture and describe how to partition memory within the circuit hierarchy using information from compiler alias analysis. We also present a method to efficiently use the block RAMs present in modern FPGAs by grouping memories together. These techniques decrease memory usage and improve performance for our HLS-generated circuits.Ph.D

The Effect of Compiler Optimizations on High-Level Synthesis for FPGAs

Abstract—We consider the impact of compiler optimizations on the quality of high-level synthesis (HLS)-generated FPGA hardware. Using a HLS tool implemented within the state-of-the-art LLVM [1] compiler, we study the effect of compiler optimiza-tions on the hardware metrics of circuit area, execution cycles, Fmax, and wall-clock time. We evaluate 56 different compiler optimizations implemented within LLVM and show that some optimizations significantly affect hardware quality. Moreover, we show that hardware quality is also affected by the order in which optimizations are applied. We then present a new HLS-directed approach to compiler optimizations, wherein we execute partial HLS and profiling at intermittent points in the optimization process and use the results to judiciously undo the impact of optimization passes predicted to be damaging to the generated hardware quality. Results show that our approach produces circuits with 16 % better speed performance, on average, versus using the standard-O3 optimization level. I

Association of inflammatory markers with hearing impairment: the english longitudinal study of ageing

Background: Hearing impairment is common at an older age and has considerable social, health and economic implications. With an increase in the ageing population, there is a need to identify modifiable risk factors for hearing impairment. A shared aetiology with cardiovascular disease (CVD) has been advanced as CVD risk factors (e.g. obesity, type 2 diabetes) are associated with a greater risk of hearing impairment. Moreover, low-grade inflammation is implicated in the aetiology of CVD. Accordingly, our aim was to investigate the association between several markers of inflammation - C-reactive protein, fibrinogen and white blood cell count - and hearing impairment. Methods: Participants of the English Longitudinal Study of Ageing aged 50-93 were included. Inflammatory marker data from both wave 4 (baseline, 2008/09) and wave 6 (2012/13) were averaged to measure systemic inflammation. Hearing acuity was measured with a simple handheld tone-producing device at follow-up (2014/15). Results: Among 4879 participants with a median age of 63 years at baseline, 1878 (38.4%) people presented hearing impairment at follow-up. All three biomarkers were positively and linearly associated with hearing impairment independent of age and sex. After further adjustment for covariates, including cardiovascular risk factors (smoking, physical activity, obesity, diabetes, hypertension, cholesterol), memory and depression, only the association with white blood cell count remained significant: odds ratio per log-unit increase; 95% confidence interval = 1.46; 1.11, 1.93. Conclusions: While white blood cell count was positively associated with hearing impairment in older adults, no relationships were found for two other markers of low-grade inflammation